1. Technical Field
Various embodiments of the present invention relate to an electronic device, and more specifically, to a memory system and a method for operating the same.
2. Related Art
Semiconductor memory devices are mainly categorized into volatile memory devices and non-volatile memory devices.
The volatile memory device is fast during write and read operations, but when power is interrupted stored data is lost. The non-volatile memory device is slow performing write and read operations when compared to the volatile memory device, but it retains its data even when power is interrupted. Therefore, the non-volatile memory device is used to store data required to be retained regardless of whether or not power is on. Examples of the non-volatile memory device include a read only memory (ROM), a mask ROM (MROM), a programmable ROM (PROM), an erasable programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a flash memory, a phase-change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a ferroelectric RAM (FRAM) etc. The flash memory is divided into a NOR type flash memory and a NAND type flash memory.
The flash memory has the strengths of the RAM, easy programming and erasing data, as well as the strengths of the ROM, retaining stored data when power is interrupted. The flash memory is used as a storage medium for portable electronic devices, such as digital cameras, personal digital assistants (PDA), and MP3 players.
When an erase command is input from a user, the flash memory may instantly perform an erase operation. Alternatively, when an erase command is input while the flash memory is performing another operation, the flash memory performs an erase operation after completing the other operation. Thereafter, when a program command is input from the user, a program operation is performed on the memory block having the completed erase operation.
After completion of the erase operation, if the program operation takes a long time then the retention characteristics of the memory cells included in a memory block during an erase state are lowered so that threshold voltages are shifted upward, and thus the erase distribution characteristics may be degraded.